I recommend you two papers.
John G. Maneatis and Mark A. Horowitz
Precise Dealy Generation Using Coupled Oscillators
IEEE JOURNAL of Solid-state Ciruits VOL 28 No. 12 Dec. 1993 P1273-P1281
John G. Maneatis
Low-Jitter Process-Independent DLL and PLL Based on Self-Biased Techniques
IEEE JOURNAL of Solid-state Circuits VOL 31. NO.11 NOv. 1996
They used the same voltage control dealy buffer. It's delay is determined
by the control voltage and independent of the supply voltage by using
a bias circuit