D*C 发帖数: 97 | 1 Synopsys的designware库是这样写的:
//-------------------------------------------------------------------------- |
l********g 发帖数: 134 | 2 u need to define more reg to save intermediate temp values for different
computations.
compiler may be able to do it, but usually u do it.
【在 D*C 的大作中提到】 : Synopsys的designware库是这样写的: : //--------------------------------------------------------------------------
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D*C 发帖数: 97 | 3 谢谢
【在 l********g 的大作中提到】 : u need to define more reg to save intermediate temp values for different : computations. : compiler may be able to do it, but usually u do it.
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m****s 发帖数: 402 | 4 如果你是做FPGA, 直接用a*b让compiler综合会把自己写好。
当然你要做版图流片,还得自己写code。 |