EE版 - 请牛人帮忙解答一下ASIC Design如何入手 |
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d****n
发帖数: 3 | 1 小弟新手想问在业界如何更好学习ASIC Design
主要从哪方面工作如手， 对RTL coding 有帮住
linting
regression
simulation
synthesis
.....
请牛人解释， 谢谢。 | D*e
发帖数: 5 | 2 非牛人.
前端：
1. Architecture design, mainly thinking and high level simulation. I think
this is the most important and fun part once you have gone through several
passes of the whole ASIC design flow.
2. RTL coding and verification by simulation using testbench
3. Assertion based formal verification
4. Logic synthesis using cadence RTL compiler of SNPS DC. Key is to
understand and develop SDC constraint file.
5. Logic equivalency check using Verplex or formality
6. DFT using scan insertio | g*g
发帖数: 6908 | 3 数字设计的工作在不断萎缩，看起来你还没开始入手，三思，呵呵
【在 d****n 的大作中提到】
: 小弟新手想问在业界如何更好学习ASIC Design
: 主要从哪方面工作如手， 对RTL coding 有帮住
: linting
: regression
: simulation
: synthesis
: .....
: 请牛人解释， 谢谢。
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