u***1 发帖数: 9 | 1 湾区公司招senior RTL/FPGA全职, 办h1b, 顺利的一周入职.
Silicon Valley AI start-up Novumind is looking for ASIC Design Engineers to&
#160;develop next-gen computing engine for Deep Learning. You will be
working closely with architects and other design engineers to generate
micro-architecture, RTL design, and/or verification plan. You are also
expected to debug, fix, and validate the design on FPGA.
Novumind just received series A funding, and is accelerating product
development.
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