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发帖数: 33 | 1 本公司是位于上海附近的一家从事高速网络集成电路开发设计的初创公司,主要产品是
高端网络交换机芯片.我们迫切寻找在该领域工作多年,有丰富经验的海外优秀人才加盟
我公司.
我们现特招聘交换机芯片高级系统架构师,交换机芯片高级ASIC设计和验证主管,软件设
计和测试主管.我们的待遇优厚.如有兴趣,或要了解更多详情, 可以站内联系我.
职位详细介绍：
1) Ethernet Switch System Senior Architect
Job Description:
Responsible for defining ASIC SOC chip & system architecture for Ethernet
communications switch devices. The candidate must have eight or more years
experience with silicon device architectures, with at least five years
experience with Ethernet communications devices. Must be able to take
Marketing requirements and convert them into cost effective detailed and
clear architecture specifications for designers to implement. Modeling and/
or proof of concept of the proposed architectures are also required along
with 10/100/1000 and 10G Layer 2 Ethernet switch knowledge and the ability
to verify the desired features/performance is achieved. Must be able to
define/document pre- and post- silicon test plans. Layer 3 and above
knowledge is a very strong plus along with the ability to prove the designs
by targeting them into FPGA’s.
Work with Marketing, Engineering and Customers to create requirements for
Network communications devices and convert them into detailed and clear
architecture specifications for implementation.Validate the proposed
architectures using behavioral Modeling and/or proof of concept systems.
Assist implementation teams to understand system level relevance of various
features, performance characteristics and provide guidance for feature
verification. Responsible for the generation of datasheets and assist
Application Engineers in creating release notes and application notes.
Excellent communication skills and ability to train others and the desire to
work well in a team environment.
Responsibilities include:
• Design and architecture definition for Ethernet communications
switch devices.
• Write functional requirements/specifications documents. Review and
analysis of technical, and user documentation.
• Direct interaction with SW and HW engineers in a collaborative
development environment
• Assessing development/test strategies and driving overall quality
improvements within development/ test organizations
• Development of documentation used internally and externally
Qualifications
Required Skills:
Minimum of 8 years’ experience in networking switch and router products
design/development.
• Extensive working knowledge of Ethernet protocols, network design
and switch configuration
• Knowledge of integrating L2/L3 protocol stacks on Ethernet switching
ASICs required
• Must be able to drive problem-solving strategies for complex issues
involving cross-functional disciplines
• Excellent verbal and written communication skills
• Strong team leadership skills
• Strong domain knowledge in L2 and L3 Ethernet switching and routing
covering 802.1Q VLANs, 802.1s MSTP, 802.3ad standards
• Domain knowledge in new Ethernet standards such as DCB and FCoE
• Development of modular switches for blade products is a plus.
• Development experience of management interfaces like SNMP, CLI, Web
desirable
• Solid experience in low level programming using C in Vxworks and
Linux embedded platforms
Minimum Education: BSEE, BSCS, or BSCE or comparable experience required,
MSEE, MSCS or MSCE preferred
2) Senior Design Manager : Network Switch ASIC/SOC Design
Job Description
Job Description:
Responsible for driving development of the high-end Ethernet Switch ASIC/SOC
. Must have a strong overall networking background and have had a key role
in designing, developing switching products. The primary job responsibility
is to ensure the on-time, high-quality delivery of the high-end Ethernet
Switch ASIC/SOC. This may be accomplished as lead engineer or as a
contributor on a larger team. Will also work with cross-functional teams to
ensure designs meet functionality, cost, reliability, regulatory compliance,
and industry standards compliance requirements. Must be able to carry out
complex tasks with a minimum of guidance and be comfortable providing
detailed guidance to others.
Responsibilities:
Lead design team to meet the objectives on design quality, time-to-
market, and so on
Design complex Ethernet Switch ASIC products for Location and
Communication applications including specification trade-offs and
optimization, micro-architecture, pipeline partition, RTL coding, Synthesis,
timing optimization, STA, chip testing and characterizationComplete block
level design (spec to RTL to post layout timing verified gates)
Design of blocks such as MAC, SPI, DMA, State machines, high speed
interfaces, etc
Develop clear design documentation
Develop both verification test suites and validation specifications
Assist in verification and validation testing
Required Skills:
MSEE degree preferably in Electronics and Communication field
Extensive working knowledge of networking protocols
10+ years of design/development experience in building network switch
and router products
7+ years of experience in Verilog/Synthesis-based ASIC Design for mass
production IC chips.
At least 4-year project/team managerial experience.
Strong domain knowledge in L2 and L3 Ethernet switching and routing
covering 802.1Q VLANs, 802.1s MSTP, 802.3ad standards
Knowledge of integrating L2/L3 protocol stacks on Ethernet switching
ASICs required
Development experience of management interfaces like SNMP, CLI, Web
desirable
Solid experience in low level programming using C in Vxworks and Linux
embedded platforms
Good understanding of architecture of Ethernet switching software
preferable
Must have good hands-on experience with RTL coding, simulation and
synthesis
Must have been closely involved with P & R, timing closure, DFT, and ATE
test vector generation
3) Senior Verification Manager: ASIC Design Verification
Job Description: The group develops ASIC's for L2/L3 switch routing. These
products support the latest networking protocols and features as well as
manage extremely large volumes of traffic of the order of several Terabits/
sec. These networking ASIC's support a large number of ports ranging from 10
/100Mb/s, 1Gb/s, 10Gb/s, 40Gb/s and 100Gb/s speeds as well as various line
interfaces and protocols.
The current job involves various aspects of verification of these complex
cutting edge ASIC's. Taking these chips to production with first time
silicon success requires a world class verification team. The successful
candidate will join the verification team and focus on verification and
configuration of various subsystems that go into these chips. Their primary
focus will be on SERDES, DDR2/3 and other critical interfaces that are part
of these chips.
Job Requirements :
1) M.S. in Electrical Engineering or equivalent + 6 years of relevant
experience in ASIC design or verification
2) Experience with Systemverilog language and hands-on coding experience
with Systemverilog for verification using various features
3) Proficiency with C/C++ programming and hands-on exposure to Object
Oriented Programming practices in applications
4) Proficiency with scripting in various popular languages such as PERL, TCL
, etc...
5) Experience with end-to-end ASIC development flow with a focus on
verification and various stages of verification of complex IC Designs from
planning through execution leading to tapeout
6) Exposure to bring up and validation of silicon and debugging problems in
a lab environment working directly with chips and systems is a big plus
4) Senior Software Manager: Network Development Software Design (Embedded
Drivers)
Description:
Responsible for hands-on embedded software development for high-end Ethernet
switches. Must have a strong overall networking background and have played
a key role in developing embedded software for Ethernet switching/routing
products. The primary job responsibility is to ensure the on-time, high-
quality delivery as a lead engineer or as a contributor on a larger team.
Responsibilities include:
Acting as an on-site expert for the embedded SW architecture of Ethernet
switches
Development (design and coding) of embedded application/protocol code
for Ethernet switches
Direct interaction with SW and HW engineers in a collaborative
development environment
Preparation of design, unit test and test result documents for assigned
features
Unit Test of developed code
Participation in code reviews
Root cause analysis, resolution of and regression testing for issues in
assigned areas of responsibility
Presentation of accurate summary and detailed project status to
management
Qualifications:
10+ years of embedded protocol development experience
Strong domain knowledge in L2 and L3 Ethernet switching and routing
covering 802.1Q VLANs, 802.1s MSTP, 802.3ad standards
Experience developing protocols in real-time operating system
environment required
Exposure to unicast and multicast routing protocol
Knowledge of integrating L2/L3 protocol stacks on Ethernet switching
ASICs required
Development experience of management interfaces like SNMP, CLI, Web
desirable
Solid experience in low level programming using C in Vxworks and Linux
embedded platforms
Good understanding of architecture of Ethernet switching software
preferable
Experience with real-time debugging with ICE and embedded debuggers
Masters's degree in Computer Engineering or related field required |
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