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The engineer will join automatic random testbench generation team of
Verification Group, Synopsys Inc., in Mountain View, California. This team
leads the development of constraints solver, which generates constrained
random stimuli as input to logic simulator (like VCS from Synopsys).
• You will be responsible for the research, design, development and
debug of current constraints solver, to further improve its performance and
keep industrial leadership.
• You will have opportunity to work on new areas of testbench
generation, or the next-generation constraints solver. Special emphasis is
placed on developing innovative scalable solutions that can handle the
largest state-of-the-art customer designs.
• You will work on extremely complex problems on large customer
designs where analysis of situations or data requires evaluation of
intangible variance factors.
The successful candidate will work with highly professional and motivated
colleagues who value and support your contribution. Synopsys is a dynamic
international workplace offering challenging and engaging work with rich
opportunities for personal and professional growth. The position carries an
attractive compensation and benefits package commensurate with a
competitive global company.
Requirements:
• Ph.D. in related engineering discipline or 5 years of related
experience in developing complex software projects.
• Proficiency in C/C++ programming. Strong background in data
structures and algorithms.
• Has strong desires to learn and explore new technologies,
demonstrates good analysis and problem-solving skills, and ability to debug
complex software.
• Knowledge and experience of System Verilog, Verilog, or compiler
would be an optional plus |
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