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JobHunting版 - 阿里北美招人 Data Center Application Analyze Architect
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Keyword:
Memory / PCIe / Interconnect / Micro Benchmark
Responsibilities:
1. For various workloads in datacenter, create system level chip
architecture/performance validation environment and benchmark, generate
workload analysis report and identify performance bottleneck as input for
silicon design team. You will get workload test case and analysis tool from
performance optimization team.
2. Responsible for the benchmark test case for FPGA prototype team,
assisting the performance analysis and proposing improvement suggestion in
the chip design stage
3. Responsible for making deep analysis of throughput, latency, jitter of
memory system and other hardware interconnection in datacenter and server
4. Responsible for performance validation of high-bandwidth and low-latency
interconnection of hardware accelerators in datacenter
5. Track leading software and hardware technology
Requirements:
1. At least 5 years of industry experience
2. Good communication skills, familiar with IT system and data center
workload scenarios, good at refining chip specifications and requirements
from complex scenarios
3. Proficient in memory access technology, deep understanding the impact of
memory access latency, bandwidth, jitter and other characteristics on
software performance; Proficient in inter-chip interconnection protocols
such as PCIe, have deep understanding of QoS and congestion handling of
interconnection protocols; have deep understanding of peripheral access
mechanisms such as storage, network and accelerator
4. Proficient in C / C + +, Verilog, system C, system Verilog. Strong
capability to understand software architecture and design
5. Proficient in benchmark and hotspot extraction. Capable locating the
hotspot function of the system and build the corresponding test case
6. Solid knowledge of processor architecture and multithreading technology
7. Familiar with data center applications such as database, big data,
machine learning will be a plus
8. High bandwidth and low latency interface development / debugging
experience will be a plus
Education:
• Computer, Software, Electronic Science Master's or Ph.D
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