One digital IC design/verification engineer openning - JobMarket版

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JobMarket版 - One digital IC design/verification engineer openning

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话题: ic话题: digital

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(共1页)

c********0
发帖数: 104

Requirements:
1) 诚实，头脑清晰
2) BSEE背景
3) 熟悉digital IC design/verification flow
4) 熟练运用verilog, 会SystemVerilog更好
5) 会Perl，C-shell等
Please send your resume to c*********[email protected]. Thanks.

(共1页)

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● 恳求工作内推: Electrical and Computer Engineering方向	● Opennings: senior PMIC designers
● 恳求工作内推: Electrical and Computer Engineering方向	● Job Opening: Verification Engineer II

相关话题的讨论汇总
话题: ic话题: digital

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