s*****k
发帖数: 604 | |
a****l
发帖数: 8211 | 2 you should first understand what is 汇编 before asking this kind of "naive"
question.
simple answer: don't know.
【在 s*****k 的大作中提到】
: 是不是不能把内存变量赋值给另一个内存变量？
|
s*****k
发帖数: 604 | 3 给个明白点的答案吧
"
【在 a****l 的大作中提到】
: you should first understand what is 汇编 before asking this kind of "naive"
: question.
: simple answer: don't know.
|
s*****k
发帖数: 604 | 4 查了一下是不行的。但是没说为什么这么设计。甚至有人说这是arbitrary rule.
大侠能否解释一下
"
【在 a****l 的大作中提到】
: you should first understand what is 汇编 before asking this kind of "naive"
: question.
: simple answer: don't know.
|
a****l
发帖数: 8211 | 5 because it is CPU specific.
【在 s*****k 的大作中提到】
: 查了一下是不行的。但是没说为什么这么设计。甚至有人说这是arbitrary rule.
: 大侠能否解释一下
:
: "
|
m****t
发帖数: 37 | 6 你可以操作address
【在 s*****k 的大作中提到】
: 是不是不能把内存变量赋值给另一个内存变量？
|
t****t
发帖数: 6806 | 7 我想提问者的意思是， 为什么x86的汇编指令不能使用两个memory operand
两个memory operand不好encode instruction, 因为所有的指令都是最多一个memory o
perand(好象是这样).
后期指令集扩展时, x86用了很多RISC的思想, 鼓励把load/save和operation分开, 这样
就更没必要把load和save放一块儿了
"
【在 a****l 的大作中提到】
: you should first understand what is 汇编 before asking this kind of "naive"
: question.
: simple answer: don't know.
|
l*****d
发帖数: 359 | |
a****l
发帖数: 8211 | 9 I think this is a really good question, maybe only the original x86
architect knows why. One guess 2c:
if two operands are all memory address, then the instruction is basically
only a "memory copy". While designing cpu core, you want instructions to be
basic and versatile, and such a single-purpose "copy" command seems not as
useful as other operations. I think the mail purpose of "mov" is to load
and store data to/from memory, so a two-memory-address-move does not seem
applicable for this ins
【在 t****t 的大作中提到】
: 我想提问者的意思是， 为什么x86的汇编指令不能使用两个memory operand
: 两个memory operand不好encode instruction, 因为所有的指令都是最多一个memory o
: perand(好象是这样).
: 后期指令集扩展时, x86用了很多RISC的思想, 鼓励把load/save和operation分开, 这样
: 就更没必要把load和save放一块儿了
:
: "
|
s*****k
发帖数: 604 | 10 对谢。是我没说明白。x86的汇编。
【在 a****l 的大作中提到】
: because it is CPU specific.
|
n**x
发帖数: 30 | 11 好像是因为就一个数据总线吧，一个指令在一个pipeline的stage里只能一次内存操作,
如果2个内存操作那么pipeline的，不管是inorder还是outorder都得加一个stage。 |
l********g
发帖数: 134 | 12 u r assuming a single-port memory (actually a cache interface seen by
pipeline).
it's well possible to have multi-port memory interface, and also mov (mem),
(mem) doesn't have to go through register file. all this inst has to do is
to check dependence and wait for a signal from memory interface (the mov is
done) to move to commit stage.
having said that, there did exist mov (mem), (mem) for some special purpose.
but it is usually translated to two mov's with memory-reg mode or a pair of
push/pop
【在 n**x 的大作中提到】
: 好像是因为就一个数据总线吧，一个指令在一个pipeline的stage里只能一次内存操作,
: 如果2个内存操作那么pipeline的，不管是inorder还是outorder都得加一个stage。
|
n**x
发帖数: 30 | 13 原来如此，什么机器这么设计？
,
is
purpose.
of
【在 l********g 的大作中提到】
: u r assuming a single-port memory (actually a cache interface seen by
: pipeline).
: it's well possible to have multi-port memory interface, and also mov (mem),
: (mem) doesn't have to go through register file. all this inst has to do is
: to check dependence and wait for a signal from memory interface (the mov is
: done) to move to commit stage.
: having said that, there did exist mov (mem), (mem) for some special purpose.
: but it is usually translated to two mov's with memory-reg mode or a pair of
: push/pop
|
d*****l
发帖数: 8441 | 14 有些DSP在自己配置小系统硬件的时候可以选用双端口memory的，但记不得DSP的汇编中
的类似MOV的操作在这种配置下能否做到在一个cycle里实现存取。还是挺怀疑的。 |
