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发帖数: 626 | 1 Anyone interested in following job please email resume directly to
dongzi AT cadence.com
Fresh graduates are welcome.
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Sr. Member of Technical Staff - Hierarchical solutions
Job ID #: 5983 Location: San Jose, CA
Functional Area: Engineering Personnel Area: San Jose, CA-Cadence
US/A000
Position Type: Regular Cost Center: Initiative - NA
Education Required: Masters Degree Salary Grade: T3
Experience Required: 3 - 5 Years Relocation Provided: No
Position Description
This position is for an R&D Software developer to assist in the development
of tools for the prototyping and implementation of very large hierarchical
ASIC designs. The candiate will be responsible for developing and
maintaining of software programs in the one or more areas: timing budgeitng,
rapid prototyping of 50+mln instance ASIC designs, hierarchical
implementation based on partial design data, interface logic models, (ILM),
clock prototyping
Position Requirements
The candidate will have demonstrated excellent software engineering skills
and must be proficient in C/C++ in a LINUX environment. The candiate must
have a strong knowledge of static timing analysis, optimization and design
abstraction techniques. The ideal candidate should have design experience
and good understanding of ASIC implementation and prototyping flows
Company Information
Cadence is the global leader in software, hardware, and services that is
driving the transformation of the electronic design automation (EDA)
industry. This application-driven approach for creating, integrating, and
optimizing designs helps customers realize Analog & Digital ICs , System-On
-Chip devices, IP and complete systems at lower costs and with higher
quality.
Cadence is an equal opportunity employer and is committed to hiring a
diverse workforce. |
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