【 以下文字转载自 EE 讨论区 】
【 原文由 PeterQian 所发表 】
System-on-a-Chip Verification - Methodology and Techniques
by Prakash Rashinkar, Peter Paterson, Leena Singh
Hardcover: 392 pages ; Dimensions (in inches): 1.07 x 9.62 x 6.50
Publisher: Kluwer Academic Publishers; (February 2001)
ISBN: 0792372794
Format: pdf
Size: 4.4M http://groups.yahoo.com/group/sv_dsp/files/
Book Description
System-On-a-Chip Verification: Methodology and Techniques is the
first book to cover verification strategies and methodologies f